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 SM5866AS D/A Converter for DSD and PCM
OVERVIEW
The SM5866AS is a D/A converter compatible with both the DSD SACD signal format and the PCM CD/DVD-Audio and similar formats. DSD employs a 1-bit data stream, from a high-order conversion at 64fs (fs = 44.1kHz), that contains high-level quantization noise in the high-frequency band above 20kHz. The SM5866AS, in DSD reproduction, has a DSD-dedicated FIR digital filter that attenuates the DSD quantization noise in the digital domain, and the resulting multi-level signal is D/A converted. In PCM reproduction, an oversampled PCM signal input, provided using a SM5847AF or similar digital filter, is converted to a multi-level signal by the 3rdorder noise shaper and then the multi-level signal is D/A converted.
FEATURES
I I
PINOUT
(Top view)
I I
I
I
I
I I I I
Mono-channel multi-level D/A converter High performance analog characteristics * DSD mode (typical values) - THD + N: -109dB (0.00036%) - D.R: 115dB * PCM mode (typical values) - THD+N: -106dB (0.00050%) - D.R: 112dB 2 selectable DSD digital filters PCM input mode * 24-bit, MSB-first, right-justified * 8-times or 4-times oversampling of fs = 16k to 192kHz System clock (CKI) Maximum operating frequency: fCKI (max) * 37.0MHz (note 1) * 45.4MHz (note 2) DSD mode fs = fCKI/512 * typ. fs = 44.1kHz * max. fs = 52.7kHz (note 1) * max. fs = 88.7kHz (note 2) PCM mode system clock * 192/256/384/512/768fs Operating voltage: 4.5 to 5.5V Operating temperature: -40 to 85C Package: 28-pin SOP Molybdenum-gate CMOS process
TSTN TO DVDD SDI SBCKA SBCKD RSTN DI BCKI WCKI DVSS BCPOL DSPOL CVDD
1
28
IMD1 IMD0 AVSSA RA IOUTA IOUTAN AVDDA AVDDB RB IOUTB IOUTBN AVSSB CVSS
14
15
CKI
PACKAGE DIMENSIONS
(Unit: mm) Weight: 0.60g
+ 0. 0.15 - 0. 1 05
7.5 0.2
Device SM5866AS
Package 28-pin SOP
2.2 0.1
1.27 0.4 0.1
0.10 0.12 M
NIPPON PRECISION CIRCUITS INC.--1
0.05 0.05
ORDERING INFORMATION
1.095TYP 18.7 0.3 0 to 10
0.5 0.2
(note 1) Under the operating conditions 1: 4.5 to 5.5V, -40 to 85C (note 2) Under the operating conditions 2: 4.75 to 5.25V, -40 to 70C
9.9 0.3
SM5866AS
BLOCK DIAGRAM
WCKI 10 DVDD 3
BCKI 9
DI 8
SBCKD SBCKA 6 5
SDI 4 12 BCPOL DSPOL
DVSS
11
PCM input interface
DSD input interface
13
7
RSTN TO TSTN
Interpolation
2 1
CVDD CKI CVSS
14
Noise shaper
15
DSD filter
28 IMD1 IMD0
16
27
AVSSB
17
26
23 level DEM DAC
23 level DEM DAC
23 level DEM DAC
23 level DEM DAC
AVSSA
18 IOUTBN
19 IOUTB
20 RB
21 AVDDB
22 AVDDA
23 IOUTAN
24 IOUTA
25 RA
NIPPON PRECISION CIRCUITS INC.--2
SM5866AS
PIN DESCRIPTION
Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Name TSTN TO DVDD SDI SBCKA SBCKD RSTN DI BCKI WCKI DVSS BCPOL DSPOL CVDD CKI CVSS AVSSB IOUTBN IOUTB RB AVDDB AVDDA IOUTAN IOUTA RA AVSSA IMD0 IMD1 I/O1 Ip O - Ip Ip Ip Ip Ip Ip Ip - Ip Ip - I - - O O I - - O O I - Ip Ip Description Test mode use only (tie HIGH or leave open for normal operation) Test mode use only (leave open for normal operation) Digital supply VDD DSD data input DSD bit clock input DSD bit clock input (tie LOW for DSD normal input mode) System reset (active LOW) PCM data input PCM bit clock input PCM word clock input Digital ground VSS DSD mode bit clock polarity select DSD mode data polarity select System clock supply VDD System clock System clock ground VSS B-channel analog ground VSS B-channel analog output (inverse-phase) B-channel analog output (in-phase) B-channel built-in resistor connection B-channel analog supply VDD A-channel analog supply VDD A-channel analog output (inverse-phase) A-channel analog output (in-phase) A-channel built-in resistor connection A-channel analog ground VSS Input mode select Input mode select
1. Ip = input pin with built-in pull-up resistor
NIPPON PRECISION CIRCUITS INC.--3
SM5866AS
SPECIFICATIONS
Absolute Maximum Ratings
DVSS = CVSS = AVSSA = AVSSB = 0 V, DVDD = CVDD = AVDDA = AVDDB
Parameter Supply voltage range Input voltage range1 Storage temperature range Power dissipation Symbol DVDD, CVDD, AVDDA, AVDDB VIN1 TSTG PD Rating -0.3 to 7.0 DVSS - 0.3 to DVDD + 0.3 -55 to 125 250 Unit V V C mW
1. Pins TSTN, SDI, SBCKA, SBCKD, RSTN, DI, BCKI, WCKI, BCPOL, DSPOL, IMD0, IMD1. Note: Rating applies at power-ON and power-OFF.
Recommended Operating Conditions
DVSS = CVSS = AVSSA = AVSSB = 0 V, DVDD = CVDD = AVDDA = AVDDB
Parameter Supply voltage range Symbol DVDD, CVDD, AVDDA, AVDDB DVDD - CVDD, DVDD - AVDDA, DVDD - AVDDB, CVDD - AVDDA, CVDD - AVDDB, AVDDA - AVDDB, DVSS - CVSS, DVSS - AVSSA, DVSS - AVSSB, CVSS - AVSSA, CVSS - AVSSB, AVSSA - AVSSB TOPR Rating 4.5 to 5.5 Unit V
Supply voltage differential
0.1
V
Operating temperature range
-40 to 85
C
Note: DVDD, CVDD, AVDDA, AVDDB are connected on the LSI substrate, and so the same potential should be applied to these inputs.
DC Electrical Characteristics
Recommended operating conditions apply unless otherwise noted.
Rating Parameter DVDD, CVDD, AVDDA, AVDDB current consumption1 CKI HIGH-level input voltage CKI LOW-level input voltage CKI input voltage HIGH-level input voltage2 LOW-level input voltage2 HIGH-level output voltage3 LOW-level output voltage3 CKI HIGH-level input current CKI LOW-level input current LOW-level input current2 HIGH-level input leakage current2 Symbol Condition min IDD VIHC VILC VINAC VIH VIL VOH VOL IIHC IILC IIL1 IIH1 IOH = -1 mA IOL = 1 mA VIN = DVDD VIN = 0 V VIN = 0 V VIN = DVDD AC coupling fCKI = 22.5792 MHz fCKI = 45.1584 MHz - - 0.7 x DVDD - 1.0 2.4 - DVDD - 0.4 - 20 20 - - typ 13 25 - - - - - - - 60 60 9 - max 18 32 - 0.3 x DVDD - - 0.5 - 0.4 120 120 18 1.0 mA mA V V Vp-p V V V V A A A A Unit
1. all outputs have no load. Input data is an NPC test pattern. 2. Pins TSTN, SDI, SBCKA, SBCKD, RSTN, DI, BCKI, WCKI, BCPOL, DSPOL, IMD0, IMD1. 3. Pin TO.
NIPPON PRECISION CIRCUITS INC.--4
SM5866AS
Switching Characteristics
System clock (CKI) Operating conditions 1: VDD = 4.5 to 5.5V, TOPR = -40 to 85C
Rating Parameter HIGH-level clock pulsewidth LOW-level clock pulsewidth Clock pulse cycle Symbol min tCWH tCWL tCKI 7 7 27 typ - - - max 100 100 200 ns ns ns Unit
Operating conditions 2: VDD = 4.75 to 5.25V, TOPR = -40 to 70C
Rating Parameter HIGH-level clock pulsewidth LOW-level clock pulsewidth Clock pulse cycle Symbol min tCWH tCWL tCKI 7 7 22 typ - - - max 100 100 200 ns ns ns Unit
t CKI CKI t CWL t CWH VIHC 0.5DVDD VILC
Reset input (RSTN)
Rating Parameter Symbol Conditions min At power-ON RSTN pulsewidth (active LOW) tRSTN After power-ON 1 100 typ - - max - - s ns Unit
NIPPON PRECISION CIRCUITS INC.--5
SM5866AS DSD normal input mode (SDI, SBCKA)
Rating Parameter SBCKA frequency SBCKA HIGH-level pulsewidth SBCKA LOW-level pulsewidth SDI setup time SDI hold time Symbol min fSBA tSBAWH tSBAWL tSDS tSDH - 40 40 10 10 typ 2.8224 - - - - max - - - - - MHz ns ns ns ns Unit
SBCKA (64fs) t SBAWH
1/f SBA
1.5V t SBAWL 1.5V t SDS t SDH
SDI
SBCKD = LOW This figure applies when BCPOL = LOW (SBCKA rising edge read-in). When BCPOL = HIGH, SBCKA has opposite phase.
DSD phase-modulated input mode (SDI, SBCKA, SBCKD)
Rating Parameter SBCKA frequency SBCKA HIGH-level pulsewidth SBCKA LOW-level pulsewidth SBCKD frequency SBCKD HIGH-level pulsewidth SBCKD LOW-level pulsewidth SDI setup time SDI hold time SBCKA rising edge SBCKD falling edge Symbol min fSBA tSBAWH tSBAWL fSBD tSBDWH tSBDWL tSDS tSDH tSAD - 20 20 - 40 40 10 10 - 20 typ 5.6448 - - 2.8224 - - - - - max - - - - - - - - 20 MHz ns ns MHz ns ns ns ns ns Unit
t SBCWH SBCKA (128fs)
t SBCWL 1.5V t SBDWL t SBDWH
1/f SBD
1/f SBA
t SAD SBCKD (64fs) t SDS SDI
BCPOL = LOW
1.5V t SDH D1 D1 D2 D2 D3 1.5V
NIPPON PRECISION CIRCUITS INC.--6
SM5866AS PCM mode data input (DI, BCKI, WCKI)
Rating Parameter BCKI HIGH-level pulsewidth BCKI LOW-level pulsewidth BCKI pulse cycle DI setup time DI hold time WCKI edge first BCKI rising edge Last BCKI rising edge WCKI edge Symbol min tBCWH tBCWL tBCY tDS tDH tWB tBW 7 7 22 5 5 10 10 typ - - - - - - - max - - - - - - - ns ns ns ns ns ns ns Unit
BCKI t BCWH DI t DS WCKI t WB t BW t DH t BCY t BCWL
1.5V
1.5V
1.5V
NIPPON PRECISION CIRCUITS INC.--7
SM5866AS
DSD Mode Analog Characteristics
Measurement Conditions Op-amp Supply voltage SM5866AS NJM5534D Mode setting Measurement temperature Input data System clock Measurement equipment Filter conditions : JRC NJM5534D : DVDD = CVDD = AVDDA = AVDDB = 5V, DVSS = CVSS = AVSSA = AVSSB = 0V : 15V : H-Mode (uses H-Filter) : 25C : SUPER AUDIO CD DAC Test Disc (PHILIPS, 3122-783-00632) : 22.5792MHz : Audio Precision System Two (RMS mode) : THD + N D.R S/N Measurement circuit Analog Characteristics
Rating Parameter LSI output level1 Evaluation board output level 0dB Total harmonic distortion -20dB -60dB Dynamic range Signal-to-noise ratio D.R S/N THD + N Symbol Vout1 Vout2 Conditions min 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, -20 dB 1 kHz, -60 dB 1 kHz, -60 dB 1 kHz, 0 dB/- 0.92 - - - - 111 112 typ 0.97 5.7 -109 (0.00036%) -92 -52 115 116 max 1.02 - -105 (0.00056%) -88 -48 - - Vrms Vrms dB dB dB dB dB Unit
22Hz HPF, 20kHz LPF (FLP-A20K), Unweighted 22Hz HPF, 20kHz LPF (AES17), A-weighted (FIL-AWT) 22Hz HPF, 20kHz LPF (AES17), A-weighted (FIL-AWT)
: Refer to "Measurement circuit".
1. Input stage I/V op-amp, U101 output level (when R101 = 0)
NIPPON PRECISION CIRCUITS INC.--8
SM5866AS
PCM Mode Analog Characteristics
Measurement Conditions Digital filter Op-amp Supply voltage SM5866AS SM5847AF NJM5534D Mode settings Measurement temperature Input data System clock Measurement equipment Filter conditions : NPC SM5847AF : JRC NJM5534D : DVDD = CVDD = AVDDA = AVDDB = 5V, DVSS = CVSS = AVSSA = AVSSB = 0V : + 3.3V : 15V : D-Mode : 25C : 44.1kHz sampling, 24-bit data, no dither : 22.5792MHz (512fs), 64fs operation : Audio Precision System Two (RMS mode) : THD + N D.R S/N Measurement circuit Analog Characteristics
Rating Parameter LSI output level1 Evaluation board output level Total harmonic distortion Dynamic range Signal-to-noise ratio Symbol Vout1 Vout2 THD + N D.R S/N Conditions min 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, 0 dB 1 kHz, -60 dB 1 kHz, 0 dB/- 1.23 - - 106 117 typ 1.28 5.7 0.0005 (-106dB) 112 120 max 1.33 - 0.0010 (-100dB) - - Vrms Vrms % dB dB Unit
22Hz HPF, 20kHz LPF (FLP-A20K) Unweighted 22Hz HPF, 22kHz LPF, A-weight (FIL-AWT) 22Hz HPF, 22kHz LPF, A-weight (FIL-AWT)
: Refer to "Measurement circuit".
1. Input stage I/V op-amp, U101 output level (when R101 = 0)
NIPPON PRECISION CIRCUITS INC.--9
VCC
+
AVDD R101 8.2k C121 100p C124 10
DSD
Measurement circuit
PCM
SW1
AVDD
AVSS
1
TSTN
IMD1
28
C113 100 AVSS
+
C103 0.1 C125 10 VCC
2
TO
IMD0
27
C104 0.1 75 AVSS 2 6 3 U101 NJM5534D 418
+
3
DVDD
AVSSA
26
SDI AVDD
+
4 C105 0.1 VEE C123 220p DSD C118 10 SW2 R105 1.5k AVSS DSD R107 2.0k PCM R108 1.5k
SDI
RA
25
SBCKA
5
SBCKA
IOUTA
24
6
SBCKD IOUTAN
23
RSTN
+
7 C111 470
RSTN
AVDDA
22
Analog Filter for DSD Cutoff=28kHz C125 R111 47 470 SW4 PCM SW5 AVSS J1 BNC
DI
8
DI C101 0.1 AVSS R106 1.5k
+
AVDDB
21
BCKI
9
BCKI
RB
20
SM5866AS
WCKI
10
WCKI
IOUTB
19
11
DVSS
IOUTBN
18
C108 0.1 75 AVSS 2 6 3 U103 NJM5534D 418 C119 10 C109 0.1 VEE AVSS
12 VCC
+
BCPOL C124 220p
AVSSB
17
AVDD R102 8.2k AVSS C122 100p C106 0.1 2 3 R103 6.8k 418
+
13
DSPOL
CVSS
16
14 C126 10 AVSS AVSS
CVDD
CKI
15
DSD R109 2.0k
SW3 PCM R110 1.5k
+
AVSS C112 100 AVDD 75 AVSS 6 U102 NJM5534D C127 10
C102 0.1
IC1 SM5866AS
AVSS
CKI
R104 6.8k C107 0.1 VEE AVSS
NIPPON PRECISION CIRCUITS INC.--10
AVSS
SM5866AS
FUNCTIONAL DESCRIPTION
Analog Pins
Current output pins (IOUTA, IOUTAN, IOUTB, IOUTBN) The SM5866AS generates current output A differential outputs, formed by input data in-phase signal processed by noise shaper A and then 23-level D/A conversion, and current output B differential outputs, formed by input data inverse-phase signal processed by noise shaper B and then 23-level D/A conversion. A and B differential outputs each have a in-phase output and inverse-phase output: A in-phase output on IOUTA, A inverse-phase output on IOUTAN, B in-phase output on IOUTB, and B inverse-phase output on IOUTBN. Using external circuits, outputs IOUTA and IOUTAN are added and I/V converted, and IOUTB and IOUTBN are added and I/V converted. Then, the converted signals are input to an op-amp stage to obtain the final output analog signal. Feedback resistor connection pins (RA, RB) There are internal built-in resistors connected between IOUTA and RA and between IOUTB and RB, which can be used as op-amp feedback resistors. These resistors have a resistance of approximately 6.8k. An external resistor can be connected to the internal resistor, in serial or parallel, in order to adjust the analog output level. Note, however, that the internal resistance can vary by as much as 20% between individual LSI devices, and thus the output level may change with the difference in the ratio of internal resistance to external resistance.
In-phase output A
RA IOUTA IOUTAN
Data input
Noise shaper A
23 Level DEM DAC
Inverse-phase output A In-phase output B
RB IOUTB IOUTBN
Noise shaper B
23 Level DEM DAC
Inverse-phase output B
Figure 1. Analog outputs
Input Mode Settings (IMD0, IMD1)
IMD0 and IMD1 pin settings switch between the DSD and PCM operating modes. In DSD mode, the DSD signal high-frequency components can be removed using one of DSD filters (H-Filter and G-Filter), or the signal can be left unfiltered.
Table 1. Input mode setting
IMD0 H H L L IMD1 H L H L Mode name H G A D Input format 1bit, 64fs, DSD 1bit, 64fs, DSD 1bit, 64fs, DSD 24bit, 8fs, PCM DSD FIR filter H-Filter G-Filter None None
NIPPON PRECISION CIRCUITS INC.--11
SM5866AS
DSD Filter Characteristics
H-Filter frequency response
0
-20
-40
-60
Gain (dB)
-80
-100
-120
-140
H-Filter H-Filter + I/V
-160 0 0.2 0.4 0.6 0.8 1
Frequency (MHz)
1.2
1.4
1.6
1.8
2
Figure 2. SM5866AS H-Filter + I/V Halfband Characteristics
0
-1
-2
Gain (dB)
-3
-4
-5
-6
H-Filter H-Filter + I/V
-7
0
20
40
60 Frequency (kHz)
80
100
120
Figure 3. SM5866AS H-Filter + I/V Passband Characteristics
NIPPON PRECISION CIRCUITS INC.--12
SM5866AS G-Filter frequency response
0
-20
-40
-60 Gain (dB)
-80
-100
-120
-140
G-Filter G-Filter + I/V
-160 0 0.2 0.4 0.6 0.8 1 Frequency (MHz) 1.2 1.4 1.6 1.8 2
Figure 4. SM5866AS G-Filter + I/V Halfband Characteristics
0
-1
-2
-3
Gain (dB)
-4
-5
-6
-7
G-Filter G-Filter + I/V
-8 0 20 40 60 80 100 120 140 Frequency (KHz)
Figure 5. SM5866AS G-Filter + I/V Passband Characteristics
NIPPON PRECISION CIRCUITS INC.--13
SM5866AS
DSD Mode Data Input Pins (SDI, SBCKA, SBCKD)
In DSD mode, the following 2 data input formats are supported. (1) Normal input format (refer to "DSD normal input mode") A 64fs clock is input on SBCKA, and 64fs rate DSD data in sync with the clock is input on SDI. SBCKD is tied LOW. (2) Phase-modulated format (refer to "DSD phase-modulated input mode") A 128fs clock is input on SBCKA, a 64fs clock is input on SBCKD, and 128fs rate phase-modulated DSD data in sync with both clocks is input on SDI. The DSD data phase modulation depends on the clock interval. When the 64fs rate DSD data is "1", SDI = HIGH if SKCKD = LOW or SDI = LOW if SBCKD = HIGH. When the DSD data is "0", SDI = LOW if SKCKD = LOW or SDI = HIGH if SBCKD = HIGH.
DSD Mode Bit Clock Polarity Select (BCPOL)
When BCPOL = LOW, data on SDI is read in on the rising edge of SBCKA. When BCPOL = HIGH, data on SDI is read in on the falling edge of SBCKA.
DSD Mode Analog Output Polarity Select (DSPOL)
When DSPOL = HIGH, the analog output has in-phase polarity relative to the SDI input data. When DSPOL = LOW, the analog output has inverse-phase polarity relative to the SDI input data.
PCM Mode Data Inputs (DI, BCKI, WCKI)
I
Input data format Data is in MSB-first, 24-bit serial, 2s-complement format.
I
Jitter-free function The SM5866AS reads serial input data on DI into the first-stage register in sync with the word clock on WCKI, while processed data is read into the last-stage register in sync with a clock derived by frequency division of the system clock. The word clock and the system clock continually undergo phase comparison and if a phase difference is detected, the system clock timing is corrected. Accordingly, if large jitter occurs in the word clock or the data sampling rate between input/output varies, the internal computational operation is not affected.
System Reset (RSTN)
The SM5866AS must be reset under the following conditions:
I I
At power-ON When the CKI system clock stops or other similar occurrences
A reset occurs when RSTN goes LOW.
NIPPON PRECISION CIRCUITS INC.--14
SM5866AS
PCM Mode Theoretical Quantization Noise
During PCM operation (D-Mode), residual quantization noise in the audio signal band to the high-frequency band, caused by the operation of the 3rd-order 23-level quantizer noise shaper, is greatly reduced. Figure 6 shows the theoretical quantization noise component for 16fs to 96fs operation.
0 10 20 30 40 50 Quantization noise (dB) 60 70 80 90 100 110 120 130 140 150 160 170 180 0 0.5 1 1.5 2 2.5 3 3.5 4 24-bit, fs quantization noise level 20-bit, fs quantization noise level 16-bit, fs quantization noise level 0 dB sine wave equivalent white noise level 16fs 24fs 32fs 48fs 64fs 96fs
Frequency (fs)
Figure 6. Quantization noise level
PCM Mode Oversampling Operation
The SM5866AS receives signal output from either a 8-times or 4-times oversampling digital filter. Internally, this data is further oversampled up to the noise shaper operating rate. The internal oversampling ratio is determined automatically by the system clock frequency and the input sampling frequency. This internal oversampling ratio must be an integer, and therefore must satisfy the conditions shown in table 2.
Table 2. Internal oversampling conditions
fWCKI and fCKI conditions1
f CKI = f WCKI x 8 x n
where n = 1, 2, 3, ...
Noise shaper operating frequency
f CKI f ns = f WCKI x n = ---------8
1. fWCKI = word clock frequency, fCKI = input system clock frequency, n = internal oversampling ratio
NIPPON PRECISION CIRCUITS INC.--15
SM5866AS
PCM Mode System Clock Frequency Example
With the circuit structure shown in figure 7, the oversampling rate for various sampling frequencies is given in table 3.
fs
Interpolating filter 8 or 4-times
fWCKI
SM5866AS
fCKI Figure 7. Circuit structure
Table 3. System clock frequency table
fs 16kHz 16kHz 16kHz 32kHz 32kHz 32kHz 32kHz 32kHz 44.1kHz 44.1kHz 44.1kHz 44.1kHz 44.1kHz 48kHz 48kHz 48kHz 48kHz 48kHz 88.2kHz 88.2kHz 88.2kHz 88.2kHz 96kHz 96kHz 96kHz 176.4kHz 176.4kHz 192kHz fCKI system clock frequency 6.144MHz (384fs) 8.192MHz (512fs) 12.288MHz (768fs) 6.144MHz (192fs) 8.192MHz (256fs) 12.288MHz (384fs) 16.384MHz (512fs) 24.576MHz (768fs) 8.4672MHz (192fs) 11.2896MHz (256fs) 16.9344MHz (384fs) 22.5792MHz (512fs) 33.8688MHz (768fs) 9.216MHz (192fs) 12.288MHz (256fs) 18.432MHz (384fs) 24.576MHz (512fs) 36.864MHz (768fs) 16.9344MHz (192fs) 22.5792MHz (256fs) 33.8688MHz (384fs) 45.1584MHz (512fs) 18.432MHz (192fs) 24.576MHz (256fs) 36.864MHz (384fs) 33.8688MHz (192fs) 45.1584MHz (256fs) 36.864MHz (192fs) Noise shaper operating rate 48fs 64fs 96fs 24fs 32fs 48fs 64fs 96fs 24fs 32fs 48fs 64fs 96fs 24fs 32fs 48fs 64fs 96fs 24fs 32fs 48fs 64fs 24fs 32fs 48fs 24fs 32fs 24fs Internal ratio (8fs input) 6 8 12 3 4 6 8 12 3 4 6 8 12 3 4 6 8 12 3 4 6 8 3 4 6 3 4 3 Internal ratio (4fs input) 12 16 24 6 8 12 16 24 6 8 12 16 24 6 8 12 16 24 6 8 12 16 6 8 12 6 8 6
NIPPON PRECISION CIRCUITS INC.--16
SM5866AS
PCM MODE INPUT TIMING EXAMPLE
PCM mode input data in 24-bit word length, MSB-first, right-justified format
1 / 8fs WCKI CKI
BCKI
MSB LSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 8. 192fs system clock input
1 / 8fs WCKI CKI
BCKI (1) * DI
MSB LSB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
BCKI (2) DI
MSB LSB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 9. 256fs system clock input
*: When the input data fits within the word clock cycle, the input data position (left/right) can be changed.
NIPPON PRECISION CIRCUITS INC.--17
SM5866AS
1 / 8fs WCKI CKI
BCKI
MSB LSB
DI
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 10. 384fs system clock input
1 / 8fs WCKI CKI
BCKI (1)* DI
MSB LSB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
BCKI (2) DI
MSB LSB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
Figure 11. 512fs system clock input
*: When the input data fits within the word clock cycle, the input data position (left/right) can be changed.
NIPPON PRECISION CIRCUITS INC.--18
SM5866AS
TYPICAL CIRCUIT DIAGRAM
DSD Mode Input Interface Connection Example
MCKI BSAL BSAR SONY CXD2751Q BCKA BCKD SACD Signal Pocessor
CKI SDI SBCKA SBCKD
SM5866AS
CKI SDI SBCKA SBCKD
SM5866AS
Figure 12. DSD Mode input interface connection example
PCM Mode Input Interface Connection Example
XTI DOL DOR SM5847AF WCKO BCKO 8fs Digital Filter DI WCKI BCKI
CKI
SM5866AS
CKI DI WCKI BCKI
SM5866AS
Figure 13. PCM Mode input interface connection example
NIPPON PRECISION CIRCUITS INC.--19
SM5866AS
Analog Output Connection Example
RA
23 level DEM DAC 23 level DEM DAC
IOUTA IOUTAN
SM5866AS
RB
23 level DEM DAC 23 level DEM DAC
IOUTB IOUTBN
Figure 14. Connection example 1
RA
23 level DEM DAC 23 level DEM DAC
IOUTA IOUTAN
SM5866AS
RB
23 level DEM DAC 23 level DEM DAC
IOUTB IOUTBN
Figure 15. Connection example 2
Note: The connection examples are connections for formats described earlier, with no specific guaranteed output analog characteristics. NPC does not accept responsibility for any patent issues relating to usage of application circuits published in this document. NIPPON PRECISION CIRCUITS INC.--20
SM5866AS
DYNAMICS CHARACTERISTICS
DSD mode (H-Mode) Dynamics Characteristics (Under Measurement Condition in page 8)
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k d B r A
+0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 5k 10k 15k 20k 25k 30k 35k 40k 45k 50k Hz 55k 60k 65k 70k 75k 80k 85k 90k 95k 100k
Figure 16. 0dB input FFT (with 1kHz notch filter 32768 pts. 8 average)
Figure 17. 0dB input FFT (with 1kHz notch filter 32768 pts. 8 average)
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k
-80
-85
-90
-95 d -100 B -105
-110
-115
-120 0.01
0.1
1 kHz
10
100
Figure 18. -60dB input FFT (32768 pts. 8 average)
Figure 19. THD + N vs. frequency
1
0 -10 -20
0.1
-30 -40 d B r A -50 -60 -70 -80
%
0.01
0.001
-90 -100 -110 -120 -120
-50 -40 -30 dBFS -20 -10 0
0.0001 -60
-110
-100
-90
-80
-70
-60 dBFS
-50
-40
-30
-20
-10
0
Figure 20. THD + N (%) vs. amplitude
Note. Input data: SUPER AUDIO CD DAC Test Disc (PHILIPS, 3122-783-00632)
Figure 21. Linearity
NIPPON PRECISION CIRCUITS INC.--21
SM5866AS
PCM mode (D-Mode) Dynamics Characteristics (Under Measurement Condition in page 9)
+0 -10 -20 -30 -40 -50 -60 d -70 B -80 r -90 A -100 -110 -120 -130 -140 -150 -160 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k
+0 -10 -20 -30 -40 -50 -60 d -70 B r -80 A -90 -100 -110 -120 -130 -140 -150 -160 10k 20k 30k 40k 50k Hz 60k 70k 80k 90k 100k
Figure 22. 0dB input FFT (with 1kHz notch filter 32768 pts. 8 average)
-80 +0 -10 -20 -30 -40 -50 -60 d -70 B r -80 A -90 -100 -110 -120 -130 -140 -150 -160 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k -82 -84 -86 -88 -90 -92 -94 -96 -98 d -100 B -102 -104 -106 -108 -110 -112 -114 -116 -118 -120
Figure 23. 0dB input FFT (with 1kHz notch filter 32768 pts. 8 average)
10
20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 24. -60dB input FFT (32768 pts. 8 average)
1 0.5 -70 -72.5 -75 0.2 0.1 0.05 -77.5 -80 -82.5 -85 -87.5 0.02 % 0.01 0.005 -90 d B r A -92.5 -95 -97.5 -100 -102.5 0.002 0.001 0.0005 -105 -107.5 -110 -112.5 -115 -117.5 0.0002 0.0001 -60 -55 -50 -45 -40 -35 -30 dBFS -25 -20 -15 -10 -5 +0 -120 -120
Figure 25. THD + N vs. frequency
-110
-100
-90
-80
-70
-60 dBFS
-50
-40
-30
-20
-10
+0
Figure 26. THD + N (%) vs. amplitude
+0 -10 -20 -30 -40 -50 d -60 B r -70 A -80 -90 -100 -110 -120 -130 -140 -140 +1 +0.9 +0.8 +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 d +0.1 B +0 r -0.1 A -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 10 -130 -120 -110 -100 -90 -80 -70 dBFS -60 -50 -40 -30 -20 -10 +0
Figure 27. THD + N (dB) vs. amplitude
20
50
100
200
500 Hz
1k
2k
5k
10k
20k
Figure 28. Linearity
Figure 29. Frequency response
NIPPON PRECISION CIRCUITS INC.--22
SM5866AS
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. 4-3, Fukuzumi 2-chome, Koto-ku, Tokyo 135-8430, Japan Telephone: +81-3-3642-6661 Facsimile: +81-3-3642-6698 http://www.npc.co.jp/ Email: sales@npc.co.jp NC0017AE 2001.05
NIPPON PRECISION CIRCUITS INC.--23


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